1. Technical Field
The disclosed embodiments relate generally to frequency dividers, including frequency dividers operable in wireless communication systems.
2. Background Information
For some applications, such as wireless communication systems it is useful to include a frequency divider circuit. In one example, a frequency divider receives an oscillatory input signal, frequency divides the input signal, and generates a divided-down oscillatory output signal. The frequency division is characterized as frequency division by an integer. Within a wireless communication system, frequency dividers see frequent use as part of a radio transceiver (transmitter/receiver). In one example within a radio transceiver, a frequency divider may be used to receive an oscillatory signal from a Local Oscillator (LO), divide-down the oscillatory signal in frequency, and generate two lower frequency output signals: a differential in-phase (I) output signal and a differential quadrature (Q) output signal. The frequencies of output signals I and Q may, for example, be half the frequency of the input signal. The Q output signal is of the same frequency as the I output signal, but shifted ninety degrees in phase with respect to the I output signal. As such, differential output signals I and Q are said to be in phase quadrature. The set of divided-down output signals may, for example, be supplied to a mixer in a receive chain of the radio transceiver. This is but one application of a frequency divider within a wireless communication system. Frequency dividers may also see use within a Phase-Locked Loop within a local oscillator, or may also be used to frequency divide signals in other places within the wireless communication system circuitry.
FIG. 1 (Prior Art) is a diagram of a type of frequency divider circuit 1. Frequency divider 1 includes divider circuitry 2 to frequency divide differential input signal LO and circuitry 3 to generate a divided-down signal with a twenty five percent duty cycle. Frequency divider 1 receives differential input signal LO involving signal LO+ on conductor 4 and signal LO− on conductor 5. Divider 1 generates two differential output signals, I and Q. Differential output signal I involves signal I+ on conductor 6 and signal I− on conductor 7. Differential output signal Q involves signal Q+ on conductor 8 and signal Q− on conductor 9. Frequency divider 2 receives input signal LO and divides input signal LO in frequency. Circuitry 3 receives signals from divider 2, but does not receive input signal LO. In this manner frequency divider 2 and circuitry 3 are arranged in series. In one example, frequency divider 2 is operable to frequency divide input signal LO by integer two and generate output signals in phase quadrature at fifty percent duty cycle. Circuitry 3 is operable to generate output signals in phase quadrature at twenty five percent duty cycle. Because divider 2 and circuitry 3 are arranged in series, noise generated by divider 2 is propagated through circuitry 3 to output signal, I and Q. Although, the circuit of FIG. 1 operates satisfactorily in some applications, it has limitations. In one example, a frequency divider, as depicted in FIG. 1 consumes more than twenty milliamps of current to perform a divide-by-four operation to generate differential output signals, I and Q, within a phase noise specification of less than ten picoseconds.
In practical circuit design, the input signal from a local oscillator is communicated over a signal line that often exceeds one millimeter in length. Over this distance, power losses along the line tend to attenuate the amplitude of the oscillatory signal. To overcome these losses and deliver a rail to rail signal to the divider, a more powerful signal must be transmitted by the local oscillator, resulting in undesirable levels of power consumption. In applications such as in a radio transceiver of a battery powered cellular telephone, it may be desired to operate a frequency divider that receives attenuated oscillatory input signals and generates low phase noise, rail to rail I and Q signals with minimal power consumption.